The invention relates to a semiconductor device comprising a lateral transistor, which device comprises a semiconductor substrate of a first conductivity type having at its surface an epitaxial layer of a second conductivity type opposed to the first, in which layer an island is defined by insulating layers of a thickness which is at least equal to that of the said layer so as to form the said lateral transistor, which comprises:
emitter and collector regions of the first conductivity type, laterally spaced apart by a region of the epitaxial layer which forms the base of the transistor, PA1 at least one electrical emitter contact zone for a metal contact pad for electrically contacting the emitter, delimited by an opening provided at the surface of the emitter region in an insulating layer which covers the surface of the device, PA1 a buried layer of the second conductivity type disposed at the level of the substrate-epitaxial layer junction, and in which lateral transistor in addition: PA1 the ratio of the surface area of the emitter region situated below the insulating layer, called first partial emitter region, to the area of the emitter region situated below said electrical emitter contact zone, called second partial emitter region, is at least equal to 2. PA1 the epitaxial layer is of the so-called thin or ultrathin type, as are the regions realised in this epitaxial layer, PA1 the first partial emitter region has a first thickness h1 and a first level of conductivity of the first type obtained by a first doping level such that the diffusion length of the minority carriers injected vertically into this first partial region is greater than or equal to its thickness, PA1 the second partial emitter region has a second thickness h2 which is at least half the said first thickness hl and a second conductivity level of the first type higher than the first level, this second level being obtained by a second doping level which is higher than the first doping level, while this second thickness and this second doping level are chosen such that this second partial region acts as a screen against the minority carriers, PA1 the first partial region completely surrounds the second partial region and, if applicable, the lower portion of the latter in the case in which h2&lt;h1.
The invention finds its application in all integrated circuits comprising lateral bipolar transistors in which a high current gain is the object.
In the following description, the term "minority careers" is to be understood to mean electrons when the region in question is of the p-type and holes when the region in question is of the n-type.
A semiconductor device comprising a high-gain lateral transistor having the characteristics mentioned above is known from a prior-art document, i.e. the European Patent EP 032 2962. According to this cited document, the current gain of lateral transistors is limited on account of their structure.
The cited document thus recommends the realisation of the emitter region with a ratio between the surface areas of the region under oxide and the electrical contact region of between 20 and 200, which renders it possible to obtain a current of holes in preference to a current of electrons in the region under oxide, whereby the gain of the transistor is increased.
Surprisingly, the current gain of this transistor is even more increased when the emitter region has an elongate shape in a longitudinal direction, wherein the ratio of the major to the minor dimension of the emitter is at least equal to 5. The device disclosed in EP 032 2962 is capable of achieving a current gain of the order of 25 to 89 in this manner.
This device has the disadvantage that it is very bulky. In the present state of technology it is indeed mainly the object to increase considerably the integration density of active and passive elements on one and the same substrate. This condition is absolutely imperative in the semiconductor industry.
While the device known from the cited document does have an attractive gain performance, on the other hand its dimensions render it unsuitable for industrial development of circuits with a very high integration density.
Nevertheless, lateral transistors are important for realising integrated circuits in which the designer wants to include inverting transistors as well as current source transistors. In this case the inverting transistors are mostly realised as lateral transistors, while the current source transistors are vertical transistors.
It is well known to those skilled in the art that the current gain factors of lateral transistors are considerably lower than those of vertical transistors. The performance levels of the transistor disclosed in the Patent Application EP 032 2962 would therefore be highly attractive for compensating this gain difference, were it not for its dimensions.
Nevertheless, this device according to the prior art marks a turning point in the technology of bipolar lateral transistors because its operation is based on surface effects which were completely unknown in the state of the art obtaining until that moment, and corresponds to completely novel theories which are in complete contradiction to the theories on which the previously used state of the art was based.
To understand the novel theory applied in this Patent EP 032 2962, those skilled in the art may profitably read the publication with the title "The Physics and Modeling of Heavily Doped Emitters" by Jesus A. del Alamo and Richard M. Swanson in IEEE Transactions on Electron Devices, vol. ED-31, no. 12, December 1984, pp. 1878-1888. The term "heavily doped emitters" should be understood to cover, at the time of the publication, emitters more strongly doped than so-called LEC (Low Emitter Concentration) transistors, i.e. doped to approximately 10.sup.18 -10.sup.20 cm.sup.-3 for transistors with a thick emitter layer of between 2 and 10 .mu.m. It is evident from this publication that the operation of strongly doped emitters of transistors having thick layers is governed by the transport and the recombination of the minority carriers, but that the mechanisms affecting the lifetime of the minority carriers in the silicon are extremely complex and should be the subject of extensive research. This publication also indicates that in many cases the experimental results are in contradiction to the model results. This results from the fact that, because of the complexity of the phenomena in question, the modelling cannot take into account all parameters. Only thorough research is capable of getting to the heart of the problem relating to the behaviour and the recombination time of the minority careers in the silicon in the emitters of the transistors.
Nevertheless, this publication establishes that this behaviour depends on the doping and the thickness of the emitter layer. The device described in the Application EP 032 2962 realises a selected number of means which utilize this teaching from the cited IEEE publication for providing the vertical bipolar transistor structure having an improved gain as described. With the appearance of the new theory which was put into practice in this Patent EP 032 2962, presenting an emitter with an area between 20 and 200 times larger than was usual in conventional devices and an extremely small contact zone, those skilled in the art were thus obliged seriously to reconsider all which had been the basis of their previous general knowledge, with all the difficulties mentioned in the IEEE publication.
Until that day, therefore, it had been particularly difficult to improve the device described in the Patent EP 032 2962, the more so since it was imperative for its industrial use in LSI (Large Scale Integration) circuits with a high integration density or VLSI (Very Large Scale Integration) circuits with a very high integration density to reduce its dimensions considerably while preserving the very valuable quality of a strongly increased gain.
It appears now that, far from helping those skilled in the art, new conditions imposed by the evolution of the technologies on the contrary have reinforced the difficulty of resolving this problem. These new conditions result from a recent technological breakthrough which consists in the realisation of layers, epitaxial and implanted, with thicknesses which are approximately 2 to 10 times smaller than those which obtained in the Patent Application EP 032 2962 cited above, which leads to thicknesses of the epitaxial layer for the base of the order of 1 .mu.m, in which layer the emitter and collector regions are formed, also with small thicknesses. Owing to this evolution, it was found that the gain of the vertical transistors decreased as the thickness of the layers used was reduced. Thus the general insights of those skilled in the art were put into question again, and their experiences acquired in the understanding of the phenomena relating to transistor emitters had to be reconsidered on these new bases, because the old theories on transistors having thick layers were no longer directly applicable.